Section 7 Bus Controller (BSC)
7.1.2
Wait State Control Register (WSCR)
Bit
Bit Name
7, 6
—
5
ABW
4
AST
3
WMS1
2
WMS0
1
WC1
0
WC0
Rev. 1.00 May 09, 2008 Page 148 of 954
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Initial
Value
R/W
Description
All 1
R/W
Reserved
The initial value should not be changed.
1
R/W
Bus Width Control
The initial value should not be changed.
1
R/W
Access State Control
The initial value should not be changed.
0
R/W
Wait Mode Select 1 and 0
0
R/W
The initial value should not be changed.
1
R/W
Wait Count 1 and 0
1
R/W
The initial value should not be changed.