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(7)
P41/TMO0/TCMCKI0/TCMMCI0
The pin function is switched as shown below according to the combination of the OS3 to OS0 bits
in TCSR of TMR_0 and the P41DDR bit. When an external clock is selected by the CKS2 to
CKS0 bits in TCMCR of TCM_0, the pin functions as the TCMCKI0 input pin. When the CMMS
bit in TCMIER of TCM_0 is set to 1, the pin functions as the TCMMCI0 input pin.
OS3 to OS0
P41DDR
Pin function
(8)
P40/TMI0/TCMCYI0
The pin function is switched as shown below according to the P40DDR bit. TMRI0 and TMCI0
are multiplexed as the TMI0 input pin. When the CCLR1 and CCLR0 bits in TCR of TMR_0 are
set to 1, the pin functions as the TMI0 (TMRI0) input pin. When an external clock is selected by
the CKS2 to CKS0 bits in TCR of TMR_0, the pin functions as the TMI0 (TMCI0) input pin.
When the TCMIPE bit in TCMIER_0 of TCM_0 is set to 1, the pin functions as the TCMCYI0
input pin.
P40DDR
Pin function
All 0
0
P41 input pin
TCMCKI0 input pin/TCMMCI0 input pin
0
P40 input pin
TMI0 input pin/TCMCYI0 input pin
1
P41 output pin
P40 output pin
Rev. 1.00 May 09, 2008 Page 169 of 954
Section 8 I/O Ports
Any of them is 1
TMO0 output pin
1
REJ09B0462-0100
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