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2.5.2
Memory Data Formats
Figure 2.8 shows the data formats in memory. The H8S/2000 CPU can access word data and
longword data in memory, however word or longword data must begin at an even address. If an
attempt is made to access word or longword data at an odd address, an address error does not
occur, however the least significant bit of the address is regarded as 0, so access begins the
preceding address. This also applies to instruction fetches.
When SR (ER7) is used as an address register to access the stack, the operand size should be word
or longword.
Data Type
Address
1-bit data
Address L
Byte data
Address L
Word data
Address 2M
Address 2M+1
Longword data
Address 2N
Address 2N+1
Address 2N+2
Address 2N+3
Figure 2.8 Memory Data Formats
Data Format
7
7
6
5
4
3
2
1
MSB
MSB
MSB
Rev. 1.00 May 09, 2008 Page 41 of 954
Section 2 CPU
0
0
LSB
LSB
LSB
REJ09B0462-0100
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