Renesas H8S/2100 Series Hardware Manual page 702

6-bit single-chip microcomputer
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Section 21 FSI Interface
LCLK
LFRAME
LAD[3:0]
ST CT
ADDR
φ
FSIAR[23:0]
FSIWDR[31:0]
FSIPPINS[7:0]
FSICR2 TE bit
FSITDR7 to
FSITDR0
FSISTR OBF bit
FSISS
FSICK (CPOS = CPHS = 0)
FSIDO
Figure 21.5 Page-Program Instruction Execution Timing
Rev. 1.00 May 09, 2008 Page 676 of 954
REJ09B0462-0100
DATA
TAR
WAIT
H'06-4A-70
H'67-45-23-01
H'02
H'67-45-23-01-70-4A-06-02
H'02->06->4A->70->01->23->45->67
SY TAR

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