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Section 8 I/O Ports
8.2.5
Port 5
(1)
P52/SCL0
The pin function is switched as shown below according to the combination of the ICE bit in ICCR
of IIC_0 and the P52DDR bit.
ICE
P52DDR
Pin function
Note: The output format for SCL0 is NMOS output only and direct bus drive is possible. When this
pin is used as the P52 output pin, the output format is NMOS push-pull.
(2)
P51/FRxD
The pin function is switched as shown below according to the combination of the SCIFOE1 bit in
SCIFCR and the SCIFE bit in HICR5 of SCIF, and the P51DDR bit.
SCIFENABLE = 1: SCIFOE1 + SCIFE
SCIFENABLE
P51DDR
Pin function
(3)
P50/FTxD
The pin function is switched as shown below according to combination of the SCIFOE1 bit in
SCIFCR and the SCIFE bit in HICR5 of SCIF, and the P50DDR bit.
SCIFENABLE = 1: SCIFOE1 + SCIFE
SCIFENABLE
P50DDR
Pin function
Rev. 1.00 May 09, 2008 Page 170 of 954
REJ09B0462-0100
0
0
P52 input pin
0
0
P51 input pin
0
0
P50 input pin
1
P52 output pin
1
P51 output pin
1
P50 output pin
1
SCL0 I/O pin
1
FRxD input pin
1
FTxD output pin
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