Renesas H8S/2100 Series Hardware Manual page 46

6-bit single-chip microcomputer
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Section 1 Overview
Type
Symbol TFP-144V BP-176V TLP-145V I/O
Interrupts
NMI
IRQ15 to
IRQ0
ExIRQ15
to
ExIRQ6
ETRST*
2
H-UDI
ETMS
ETDO
ETDI
ETCK
8-bit
TMO0
timer
TMO1
(TMR_0,
TMOX
TMR_1,
TMOY
TMR_X,
TMI0
TMR_Y)
TMI1
TMIX
TMIY
Rev. 1.00 May 09, 2008 Page 20 of 954
REJ09B0462-0100
Pin No.
11
F4
17,
G2, H2,
19 to 21,
J4, J3,
47 to 50,
N6, R6,
85, 84,
P6, M7,
135 to 133,
J13, J12,
24 to 22
B6, A6,
C6, K4,
J2, J1
51 to 58,
R7, P7,
12, 10
M8, R8,
P8, N9,
R9, P9,
F3, E1
27
L1
28
L2
29
L4
30
M1
31
M2
137
B5
3
B1
47
N6
48
R6
136
A5
2
C3
58
P9
57
R9
Name and Function
E3
Input
Nonmaskable interrupt request
input pin
F1, G4,
Input
These pins request a maskable
H4, G1,
interrupt.
L5, M6,
To which pin an IRQ interrupt is
N5, K5,
input can be selected from the
IRQn and ExIRQn pins.
H12, J11,
C6, B5,
(n = 15 to 6)
A6, H2,
G3, J4
L6, M7,
Input
N6, K6,
K7, K8,
N7, M8,
F2, E2
H3
Input
Interface pins for emulator
Reset by holding the ETRST pin
K4
Input
to low level regardless of the H-
J1
Output
UDI activation. At this time, the
ETRST pin should be held low
K2
Input
level for 20 clocks of ETCK.
J3
Input
Then, to activate the H-UDI, the
ETRST pin should be set to high
level and the pins ETCK, ETMS,
and ETDI should be set
appropriately. In the normal
operation without activating the
H-UDI, pins ETCK, ETMS, ETDI,
and ETDO should be pulled up to
high level. The ETRST pin is
pulled up inside the chip.
A5
Output Waveform output pins with output
C2
compare function
L5
M6
D4
Input
Counter event input and count
A1
reset input pins
M8
N7

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