Table of Contents
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Section 27 List of Registers
Register Name
Repeat header maximum low-level
period register
Reset status register
TCM timer counter register_0
TCM timer cycle upper limit
register_0
TCM input capture register_0
TCM input capture buffer
register_0
TCM status register_0
TCM control register_0
TCM interrupt enable register_0
TCM cycle lower limit register_0
TCM timer counter register_1
TCM timer cycle upper limit
register_1
TCM input capture register_1
TCM input capture buffer
register_1
TCM status register_1
TCM control register_1
TCM interrupt enable register_1
TCM cycle lower limit register_1
TCM timer counter register_2
TCM cycle upper limit register_2
TCM input capture register_2
TCM input capture buffer
register_2
TCM status register_2
TCM control register_2
TCM interrupt enable register_2
TCM cycle lower limit register_2
Rev. 1.00 May 09, 2008 Page 832 of 954
REJ09B0462-0100
Number
Abbreviation
of bits
RMAX
8
RSTSR
8
TCMCNT_0
16
TCMMLCM_0
16
TCMICR_0
16
TCMICRF_0
16
TCMCSR_0
8
TCMCR_0
8
TCMIER_0
8
TCMMINCM_0 16
TCMCNT_1
16
TCMMLCM_1
16
TCMICR_1
16
TCMICRF_1
16
TCMCSR_1
8
TCMCR_1
8
TCMIER_1
8
TCMMINCM_1 16
TCMCNT_2
16
TCMMINCM_2 16
TCMICR_2
16
TCMICRR_2
16
TCMCSR_2
16
TCMCR_2
8
TCMIER_2
8
TCMMINCM_2 16
Address
Module
H'FA51
CIR
H'FB35
SYSTEM 8
H'FBC0
TCM_0
H'FBC2
TCM_0
H'FBC4
TCM_0
H'FBC6
TCM_0
H'FBC8
TCM_0
H'FBC9
TCM_0
H'FBCA
TCM_0
H'FBCC
TCM_0
H'FBD0
TCM_1
H'FBD2
TCM_1
H'FBD4
TCM_1
H'FBD6
TCM_1
H'FBD8
TCM_1
H'FBD9
TCM_1
H'FBDA
TCM_1
H'FBDC
TCM_1
H'FBE0
TCM_2
H'FBE2
TCM_2
H'FBE4
TCM_2
H'FBE6
TCM_2
H'FBE8
TCM_2
H'FBE9
TCM_2
H'FBEA
TCM_2
H'FBEC
TCM_2
Data
Access
Width
States
8
2
2
16
2
16
2
16
2
16
2
8
2
8
2
8
2
16
2
16
2
16
2
16
2
16
2
8
2
8
2
8
2
16
2
16
2
16
2
16
2
16
2
16
2
8
2
8
2
16
2
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