Renesas H8S/2100 Series Hardware Manual page 589

6-bit single-chip microcomputer
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Bit
Bit Name
3
RXCR3
2
RXCR2
1
RXCR1
0
RXCR0
Initial
Value
R/W
Description
0
R
Receive Counter
0
R
These bits indicate the received data bit. Their value is
incremented on the fall of KCLK. These bits cannot be
0
R
modified.
0
R
The receive counter is initialized by a reset and when
0 is written in KBE. The value returns to B'0000 after a
stop bit is received.
0000: —
0001: Start bit
0010: KB0
0011: KB1
0100: KB2
0101: KB3
0110: KB4
0111: KB5
1000: KB6
1001: KB7
1010: Parity bit
1011: —
11xx: —
Section 19 Keyboard Buffer Control Unit (PS2)
Rev. 1.00 May 09, 2008 Page 563 of 954
REJ09B0462-0100

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