Renesas H8S/2100 Series Hardware Manual page 49

Type Symbol
LPC LAD3 to
Interface LAD0
(LPC)
LFRAME
LRESET
LCLK
SERIRQ
LSCI,
LSMI,
PME
GA20
CLKRUN 131
LPCPD
FSI FSISS
interface
FSICK
(FSI)
FSIDI
FSIDO
CIR CIRI
interface
(CIR)
Pin No.
TFP-144V BP-176V
124 to B9, A9, C9,
121 D9
125 D8
126 C8
127 A8
128 D7
119, 120, A10, B10,
129 C7
130 A7
B7
132 D6
113 D11
114 A12
115 C11
116 B11
26 K2
TLP-145V I/O
B7, C8, D9, Input/
A9 Output
A8 Input
D8 Input
D7 Input
D6 Input/
Output
C9, B8, A7 Input/
Output
B6 Input/
Output
C7 Input/
Output
D5 Input
A11 Output FSI slave select pin
C11 Output Clock output pin
B10 Input
C10 Output Transmit data output pin
J2 Input
Rev. 1.00 May 09, 2008 Page 23 of 954
Section 1 Overview
Name and Function
LPC command, address,
and data input/output pins
Input pin indicating LPC
cycle start and forced
termination of an abnormal
LPC cycle
Input pin indicating LPC
reset
LPC clock input pin
LPC serial host interrupt
(HIRQ1 to HIRQ15)
input/output pin
LPC auxiliary output pins.
Functionally, they are
general I/O ports.
GATE A20 control signal
output pin. Output state
monitoring input is
possible.
Input/output pin that
requests the start of LCLK
operation when LCLK is
stopped.
Input pin that controls LPC
module shutdown.
Receive data input pin
Receive data input pin
REJ09B0462-0100