Renesas H8S/2100 Series Hardware Manual page 355

Bit Bit Name
5 OVF
4 ICIE
3 OS3
2 OS2
1 OS1
0 OS0
Note: * Only 0 can be written, for flag clearing.
Initial
Value R/W Description
0 R/(W)* Timer Overflow Flag
[Setting condition]
When TCNT_Y overflows from H'FF to H'00
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
0 R/W Input Capture Interrupt Enable
Enables or disables the ICF interrupt request (ICIX)
when the ICF bit in TCSR_X is set to 1.
0: ICF interrupt request (ICIX) is disabled
1: ICF interrupt request (ICIX) is enabled
0 R/W Output Select 3 and 2
0 R/W These bits specify how the TMOY pin output level is to
be changed by compare-match B of TCORB_Y and
TCNT_Y.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
0 R/W Output Select 1 and 0
0 R/W These bits specify how the TMOY pin output level is to
be changed by compare-match A of TCORA_Y and
TCNT_Y.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
Section 12 8-Bit Timer (TMR)
Rev. 1.00 May 09, 2008 Page 329 of 954
REJ09B0462-0100