Renesas H8S/2100 Series Hardware Manual page 711

6-bit single-chip microcomputer
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FSI Command Usage Example 1 (SPI Flash Memory Erasure)
The FSI commands enable the execution of several instructions for the SPI flash memory. Figure
21.15 shows an example of executing the SPI flash memory erasure instruction.
FSIHBAR: H'231F
FSISR: H'00 (1 MB)
CMDHBAR: H'EFFF
STEP1
H'EFFF_F000
STEP2
H'2325_4A76
STEP3
H'EFFF_F000
In flash memory erasure, the SPI flash memory address is stored in FSIAR and an erasure
instruction for the SPI flash memory is executed by an SPI command. The flash memory address
storage in FSIAR is performed by writing data to the sector or block address to be erased via the
host. To distinguish the SPI flash memory erasure from the SPI flash memory programming, the
erasure is performed in the following sequence using the FSIDMYE.
CMD0 (H'10)
Host address
Dummy data
Host address
CMD0 (H'11)
Host address
Figure 21.15 SPI Flash Memory Erasure (Example)
FSICMDR[7:0]
Command data (H'10)
FSICMDI
B'0
B'1
FSIDMDIE
B'1
FSIAR[23:0]
H'06_4A76
FSICMDR[7:0]
Command data (H'11)
FSICMDI
B'0
B'1
FSICMDIE
B'1
Rev. 1.00 May 09, 2008 Page 685 of 954
Section 21 FSI Interface
FSIDMYE
B'0
B'1
Interrupt requests
occur
FSIDMYE
B'1
FSIDMYE
B'1
B'0
Interrupt requests
occur
REJ09B0462-0100

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