Renesas H8S/2100 Series Hardware Manual page 303

6-bit single-chip microcomputer
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Output Compare Output Timing
A compare match signal is generated in the final state in which TCNT and TGR match (the point
at which the count value matched by TCNT is updated). When a compare match signal is
generated, the output value set in TIOR is output at the output compare output pin (TIOC pin).
After a match between TCNT and TGR, the compare match signal is not generated until the
TCNT input clock is generated. Figure 10.32 shows output compare output timing.
φ
TCNT
input clock
TCNT
TGR
Compare
match signal
TIOC pin
Input Capture Signal Timing: Figure 10.33 shows input capture signal timing.
φ
Input capture
input
Input capture
signal
TCNT
TGR
N
N
Figure 10.32 Output Compare Output Timing
N
Figure 10.33 Input Capture Input Signal Timing
Section 10 16-Bit Timer Pulse Unit (TPU)
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Rev. 1.00 May 09, 2008 Page 277 of 954
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REJ09B0462-0100

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