Renesas H8S/2100 Series Hardware Manual page 515

Register
FMCR LOOP BACK,
OUT2, OUT1,
RTS, DTR
FLSR RXFIFOERR,
TEMT, THRE,
BI, FE, PE,
OE, DR
FMSR DDCD, TERI,
DDSR, DCTS
FSCR Bits 7 to 0

SCIF
transmission
sequencer
(inner state)
Section 16 Serial Communication Interface with FIFO (SCIF)
System
Reset SCIFRST REGRST
Initialized Stopped
Initialized Stopped
Initialized Stopped
Initialized Stopped
Initialized Initialized Stopped
LPC
Reset
Initialized Initialized Stopped
Initialized Initialized Stopped
Initialized Initialized Stopped
Initialized Initialized Stopped
Initialized Stopped
Rev. 1.00 May 09, 2008 Page 489 of 954
LPC LPC
Shutdown Abort
Stopped
Stopped
Stopped
Stopped
Stopped
REJ09B0462-0100