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Register Name
Timer counter _1
Timer general register A_1
Timer general register B_1
PEC operation data input register
PEC operation data re-input
register
PEC operation result output
register
LPC channel 1 address register H
LPC channel 1 address register L
LPC channel 2 address register H
LPC channel 2 address register L
SCIF address register H
SCIF address register L
LPC channel 4 address register H
LPC channel 4 address register L
Input data register 4
Output data register 4
Status register 4
Host interface control register 4
SERIRQ control register 2
SERIRQ control register 3
Port 6 noise canceler enable
register
Port 6 noise canceler decision
control register
Port 6 noise cancel cycle setting
register
Port C noise canceler enable
register
Port C noise canceler decision
control register
Number
Abbreviation
of bits
TCNT_1
16
TGRA_1
16
TGRB_1
16
PECX
8
PECY
8
PECZ
8
LADR1H
8
LADR1L
8
LADR2H
8
LADR2L
8
SCIFADRH
8
SCIFADRL
8
LADR4H
8
LADR4L
8
IDR4
8
ODR4
8
STR4
8
HICR4
8
SIRQCR2
8
SIRQCR3
8
P6NCE
8
P6NCMC
8
P6NCCS
8
PCNCE
8
PCNCMC
8
Section 27 List of Registers
Address
Module
H'FD46
TPU_1
H'FD48
TPU_1
H'FD4A
TPU_1
H'FD60
SMBUS
H'FD61
SMBUS
H'FD63
SMBUS
H'FDC0
LPC
H'FDC1
LPC
H'FDC2
LPC
H'FDC3
LPC
H'FDC4
LPC
H'FDC5
LPC
H'FDD4
LPC
H'FDD5
LPC
H'FDD6
LPC
H'FDD7
LPC
H'FDD8
LPC
H'FDD9
LPC
H'FDDA
LPC
H'FDDB
LPC
H'FE00
PORT
(PORTS = 0)
H'FE01
PORT
(PORTS = 0)
H'FE02
PORT
(PORTS = 0)
H'FE03
PORT
(PORTS = 0)
H'FE04
PORT
(PORTS = 0)
Rev. 1.00 May 09, 2008 Page 837 of 954
Data
Access
Width
States
16
2
16
2
16
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
REJ09B0462-0100
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