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2.7.8
Memory Indirect@@aa:8
This mode can be used by the JMP and JSR instructions. The instruction code contains an 8-bit
absolute address specifying a memory operand. This memory operand contains a branch address.
The upper bits of the absolute address are all assumed to be 0, so the address range is 0 to 255
(H'000000 to H'0000FF). The memory operand is a longword operand, the first byte of which is
assumed to be 0 (H'00).
Note that the first part of the address range is also the exception vector area. For further details,
refer to section 5, Exception Handling.
If an odd address is specified in word or longword memory access, or as a branch address, the
least significant bit is regarded as 0, causing data to be accessed or instruction code to be fetched
at the address preceding the specified address. (For further information, see section 2.5.2, Memory
Data Formats.)
Figure 2.10 Branch Address Specification in Memory Indirect Mode
Specified
Reserved
by @aa:8
Branch address
Advanced Mode
Rev. 1.00 May 09, 2008 Page 57 of 954
REJ09B0462-0100
Section 2 CPU
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