Renesas H8S/2100 Series Hardware Manual page 393

• Bit Functions in Smart Card Interface Mode (when SMIF in SCMR = 1)
Bit Bit Name
7 GM
6 BLK
5 PE
4 O/E
3 BCP1
2 BCP0
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Section 14 Serial Communication Interface (SCI)
Description
GSM Mode
Setting this bit to 1 allows GSM mode operation. In
GSM mode, the TEND set timing is put forward to
11.0 etu* from the start and the clock output control
function is appended. For details, see section
14.7.8, Clock Output Control.
Setting this bit to 1 allows block transfer mode
operation. For details, see section 14.7.3, Block
Transfer Mode.
Parity Enable (valid only in asynchronous mode)
When this bit is set to 1, the parity bit is added to
transmit data before transmission, and the parity bit
is checked in reception. Set this bit to 1 in smart
card interface mode.
Parity Mode (valid only when the PE bit is 1 in
asynchronous mode)
0: Selects even parity
1: Selects odd parity
For details on the usage of this bit in smart card
interface mode, see section 14.7.2, Data Format
(Except in Block Transfer Mode).
Basic Clock Pulse 1 and 0
These bits select the number of basic clock cycles in
a 1-bit data transfer time in smart card interface
mode.
00: 32 clock cycles (S = 32)
01: 64 clock cycles (S = 64)
10: 372 clock cycles (S = 372)
11: 256 clock cycles (S = 256)
For details, see section 14.7.4, Receive Data
Sampling Timing and Reception Margin. S is
described in section 14.3.9, Bit Rate Register
(BRR).
Rev. 1.00 May 09, 2008 Page 367 of 954
REJ09B0462-0100