Section 23 Ram - Renesas H8S/2100 Series Hardware Manual

Section 23 RAM

Section 23 RAM
This LSI has 4 Kbytes of on-chip high-speed static RAM. The RAM is connected to the CPU by a
16-bit data bus, enabling one-state access by the CPU for both byte data and word data.
The on-chip RAM can be enabled or disabled by means of the RAME bit in the system control
register (SYSCR). For details on SYSCR, see section 3.2.2, System Control Register (SYSCR).
Rev. 1.00 May 09, 2008 Page 713 of 954
REJ09B0462-0100