Kclki And Kdi Read Timing; Kclko And Kdo Write Timing - Renesas H8S/2100 Series Hardware Manual

19.4.4

KCLKI and KDI Read Timing

Figure 19.9 shows the KCLKI and KDI read timing.
φ*
Internal read
signal
KCLK, KD
(pin state)
KCLKI, KDI
register
Internal data bus
(read data)
Note: * φ here indicates the clock signal frequency-divided by N for medium-speed mode.
19.4.5

KCLKO and KDO Write Timing

Figure 19.10 shows the KLCKO and KDO write timing and the KCLK and KD pin states.
φ*
Internal write
signal
KCLKO, KDO
register
KCLK, KD
(pin state)
Note: * φ here indicates the clock signal frequency-divided by N for medium-speed mode.
Figure 19.9 KCLKI and KDI Read Timing
T1
Figure 19.10 KCLKO and KDO Write Timing
Section 19 Keyboard Buffer Control Unit (PS2)
T1 T2
T2
Rev. 1.00 May 09, 2008 Page 571 of 954
REJ09B0462-0100