Header Minimum/Maximum Low-Level Period Register (Hlmin/Hlmax); Data Level 1 Minimum/Maximum Period Register (Dt1Min/Dt1Max) - Renesas H8S/2100 Series Hardware Manual

6-bit single-chip microcomputer
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Section 15 CIR Interface
15.3.8

Header Minimum/Maximum Low-Level Period Register (HLMIN/HLMAX)

HLMIN and HLMAX specify the minimum and maximum low-level period for a header.
• HLMIN
Bit
Bit Name
7 to 0
HLMIN7 to
HLMIN0
• HLMAX
Bit
Bit Name
7 to 0
HLMAX7 to
HLMAX0
15.3.9

Data Level 1 Minimum/Maximum Period Register (DT1MIN/DT1MAX)

DT1MIN and DT1MAX specify the minimum and maximum low-level period for logic 1.
• DT1MIN
Bit
Bit Name
7 to 0
DT1MIN7 to
DT1MIN0
• DT1MAX
Bit
Bit Name
7 to 0
DT1MAX7 to
DT1MAX0
Rev. 1.00 May 09, 2008 Page 440 of 954
REJ09B0462-0100
Initial
Value
R/W
Description
H'00
R/W
Specifies the minimum low-level period for a header.
Initial
Value
R/W
Description
H'00
R/W
Specifies the maximum low-level period for a header.
Initial
Value
R/W
Description
H'00
R/W
Specifies the minimum low-level period for logic 1.
Initial
Value
R/W
Description
H'00
R/W
Specifies the maximum low-level period for logic 1.

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