Table of Contents
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Section 20 LPC Interface (LPC)
• LADR2L
Initial
Value
Bit
Bit Name
7
Bit 7
0
6
Bit 6
1
5
Bit 5
1
4
Bit 4
0
3
Bit 3
0
2
Bit 2
0
1
Bit 1
1
0
Bit 0
0
• Host select register
Bits 5 to 3
Bits 15 to 3 in LADR2
Bits 15 to 3 in LADR2
Bits 15 to 3 in LADR2
Bits 15 to 3 in LADR2
Note:
*
When channel 2 is used, the content of LADR2 must be set so that the addresses for
channels 1, 3, 4, and SCIF are different.
Rev. 1.00 May 09, 2008 Page 600 of 954
REJ09B0462-0100
R/W
Slave Host Description
R/W
Channel 2 Address Bits 7 to 3
R/W
Set the LPC channel 2 host address.
R/W
R/W
R/W
R/W
Reserved
This bit is ignored when an address match is decided.
R/W
Channel 2 Address Bits 1 and 0
R/W
Set the LPC channel 2 host address.
I/O Address
Bit 2
Bits 1 and 0
0
Bits 1 and 0 in LADR2
1
Bits 1 and 0 in LADR2
0
Bits 1 and 0 in LADR2
1
Bits 1 and 0 in LADR2
Transfer
Cycle
Host Select Register
I/O write
IDR2 write (data)
I/O write
IDR2 write (command)
I/O read
ODR2 read
I/O read
STR2 read
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