Renesas H8S/2100 Series Hardware Manual page 408

Section 14 Serial Communication Interface (SCI)
Table 14.7 Maximum Bit Rate with External Clock Input (Clocked Synchronous Mode)
External Input
φ (MHz)
Clock (MHz)
8 1.3333
10 1.6667
12 2.0000
14 2.3333
Table 14.8 BRR Settings for Various Bit Rates (Smart Card Interface Mode, n = 0, S= 372)
10.00
Bit Rate
n N
(bit/s)
9600 0 1
Bit Rate
(bit/s)
n N
9600 0 2
Table 14.9 Maximum Bit Rate for Each Frequency (Smart Card Interface Mode, S = 372)
Maximum Bit
Rate
φ (MHz)
(bit/s)
10.00 13441
13.00 17473
14.2848 19200
Rev. 1.00 May 09, 2008 Page 382 of 954
REJ09B0462-0100
Maximum Bit
Rate (bit/s)
1333333.3
1666666.7
2000000.0
2333333.3
Operating Frequency φ (MHz)
13.00
Error n N
(%)
30 0 1
Operating Frequency φ (MHz)
18.00
Error (%) n
–15.99 0
n N
0 0
0 0
0 0
External Input
φ (MHz)
Clock (MHz)
16 2.6667
18 3.0000
20 3.3333
25 4.1667
14.2848
Error n N
(%)
–8.99 0 1
20.00
N Error (%) n
2 –6.65
Maximum Bit
Rate
φ (MHz)
(bit/s)
16.00 21505
18.00 24194
20.00 26882
25.00 33602
Maximum Bit
Rate (bit/s)
2666666.7
3000000.0
3333333.3
4166666.7
16.00
Error (%) n N
0.00 0 1
25.00
N Error (%)
0 3 –12.49
n
0
0
0
0
Error
(%)
12.01
N
0
0
0
0