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Section 21 FSI Interface
21.3.12 FSI Command Host Base Address Registers H and L (CMDHBARH and
CMDHBARL)
CMDHBARH and CMDHBARL set the upper 16 bits of the host start address which is necessary
to set a command address. The lower 16 bits of the host start address range from H'F000 to
H'F00F. If a host address to be input to CMDHBARH and CMDHBARL is out of the determined
range, Sync will not be returned. If FW memory cycle is used, bit 31 to bit 28 in CMDHBARH is
set as IDSEL. During FSI operation (in the state where FSIE or FSILIE is set), do not change the
setting in this register.
• CMDHBARH
Bit
Bit Name
7 to 0 bit 31 to
bit 24
• CMDHBARL
Bit
Bit Name
7 to 0 bit 23 to
bit 16
21.3.13 FSI Command Register (FSICMDR)
FSICMDR stores command data during FSI command reception. FSICMDR stores command data
when the FSICMDI bit in FSILSTR1 is cleared to 0. It does not store command data when the
FSICMDI bit is set to 1.
Bit
Bit Name
7 to 0 bit 7 to bit 0 All 0
Rev. 1.00 May 09, 2008 Page 662 of 954
REJ09B0462-0100
R/W
Initial
Value
EC
Host Description
All 0
R/W
R/W
Initial
Value
EC
Host Description
All 0
R/W
R/W
Initial
Value
EC
Host Description
R
These bits specify bits [31:24] of the host start
address.
These bits specify bits [23:16] of the host start
address.
These bits store an FSI command.
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