Renesas H8S/2100 Series Hardware Manual page 124

6-bit single-chip microcomputer
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Section 6 Interrupt Controller
SYSCR3
SYSCR
NMI input
IRQ input
KIN input
WUE input
Internal interrupt
sources
WOVI0 to IBFI3
[Legend]
Interrupt control register
ICR:
IRQ sense control register
ISCR:
IRQ enable register
IER:
IRQ status register
ISR:
Keyboard matrix interrupt mask register
KMIMR:
Wake-up event interrupt mask register
WUEMR:
System control register
SYSCR:
System control register 3
SYSCR3:
Rev. 1.00 May 09, 2008 Page 98 of 954
REJ09B0462-0100
EIVS
INTM1, INTM0
NMIEG
NMI input
IRQ input
ISR
ISCR
IER
KMIMR WUEMR
KIN, WUE
input
Interrupt controller
Figure 6.1 Block Diagram of Interrupt Controller
Interrupt
request
Vector number
Priority level
determination
ICR
CPU
I, UI
CCR

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