Renesas H8S/2100 Series Hardware Manual page 305

6-bit single-chip microcomputer
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(4)
Buffer Operation Timing
Figures 10.36 and 10.37 show the timing in buffer operation.
φ
TCNT
Compare
match signal
TGRA,
TGRB
TGRC,
TGRD
Figure 10.36 Buffer Operation Timing (Compare Match)
φ
Input capture
signal
TCNT
TGRA,
TGRB
TGRC,
TGRD
Figure 10.37 Buffer Operation Timing (Input Capture)
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n
N
N
N
n
N
n
Section 10 16-Bit Timer Pulse Unit (TPU)
n + 1
N + 1
N + 1
Rev. 1.00 May 09, 2008 Page 279 of 954
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REJ09B0462-0100

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