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8.2.4
Port 4
(1)
P47/PWMU5B
The pin function is switched as shown below according to the combination of the PWM5E bit in
PWMOUTCR of PWMU_B, and the P47DDR bit.
P47DDR
PWM5E
Pin function
(2)
P46/PWMU4B
The pin function is switched as shown below according to the combination of the PWM4E bit in
PWMOUTCR of PWMU_B, and the P46DDR bit.
P46DDR
PWM4E
Pin function
(3)
P45/PWMU3B/TCMCKI2/TCMMCI2
The pin function is switched as shown below according to the combination of the PWM3E bit in
PWMOUTCR of PWMU_B, and the P45DDR bit. When an external clock is selected by the
CKS2 to CKS0 bits in TCMCR of TCM_2, the pin functions as the TCMCKI2 input pin. When
the CMMS bit in TCMIER of TCM_2 is set to 1, the pin functions as the TCMMCI2 input pin.
P45DDR
PWM3E
Pin function
0
P47 input pin
0
P46 input pin
0
P45 input pin
TCMCKI2 input pin/TCMMCI2 input pin
1
0
P47 output pin
1
0
P46 output pin
1
0
P45 output pin
Rev. 1.00 May 09, 2008 Page 167 of 954
Section 8 I/O Ports
1
PWMU5B output pin
1
PWMU4B output pin
1
PWMU3B output pin
REJ09B0462-0100
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