Renesas H8S/2100 Series Hardware Manual page 318

6-bit single-chip microcomputer
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Section 11 16-Bit Cycle Measurement Timer (TCM)
Figure 11.1 is a block diagram of the TCM.
External clock
TCMCKI
TCMMCI
TCMCYI
[Legend]
TCMCNT:
TCMMLCM:
TCMMINCM:
TCMICR:
TCMICRF:
TCMCSR:
TCMIER:
TCMCR:
Rev. 1.00 May 09, 2008 Page 292 of 954
REJ09B0462-0100
Internal clock
φ/2, φ/8, φ/16, φ/32
φ/64, φ/128, φ/256
Clock selection
Overflow
Clear
Control
Compare matrch
logic
Cycle upper limit overflow
Cycle lower limit underflow
Input capture
TICI
TCMI
TOVMI
TUDI
TOVI
TCM timer counter
TCM cycle upper limit register
TCM cycle lower limit register
TCM input capture register
TCM input capture buffer register
TCM status register
TCM interrupt enable register
TCM control register
Figure 11.1 Block Diagram of the TCM
TCMCNT
Comparator
TCMMLCM
TCMMINCM
TCMICR
TCMICRF
TCMCSR
TCMIER
TCMCR

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