Renesas H8S/2100 Series Hardware Manual page 724

Section 22 A/D Converter
Bit Bit Name Initial Value R/W Description
5 ADST 0

4 0
3 CH3 0
2 CH2 0
1 CH1 0
0 CH0 0
[Legend]
X: Don't care
Note: Only 0 can be written to clear the flag.
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Rev. 1.00 May 09, 2008 Page 698 of 954
REJ09B0462-0100
R/W A/D Start
When this bit is cleared to 0, A/D conversion stops and
enters wait state. When this bit is set to 1 by a conversion
start trigger from software, TPU, or TMR, A/D conversion
starts. This bit remains set to 1 during A/D conversion. In
single mode, this bit is automatically cleared to 0 when
conversion on the specified channel ends. In scan mode,
conversion continues sequentially on the specified channels
until this bit is cleared to 0 by a reset, or software.

Reserved
This bit is always read as 0 and cannot be modified.
R/W Channel Select 3 to 0
R/W Select analog input channels with the SCANE and SCANS
bits in ADCRS.
R/W
The input channel setting must be made when conversion
R/W
is halted (ADST = 0).
When SCANE = 0
and SCANS = X
0000: AN0
0001: AN1
0010: AN2
0011: AN3
0100: AN4
0101: AN5
0110: AN6
0111: AN7
1000: AN8
1001: AN9
1010: AN10
1011: AN11
11xx: Setting
prohibited
When SCANE = 1
and SCANS = 0
0000: AN0
0001: AN0, AN1
0010: AN0 to AN2
0011: AN0 to AN3
0100: AN4
0101: AN4, AN5
0110: AN4 to AN6
0111: AN4 to AN7
1000: AN8
1001: AN8, AN9
1010: AN8 to AN10
1011: AN8 to AN11
11xx: Setting
prohibited
When SCANE = 1
and SCANS = 1
0000: AN0
0001: AN0, AN1
0010: AN0 to AN2
0011: AN0 to AN3
0100: AN0 to AN4
0101: AN0 to AN5
0110: AN0 to AN6
0111: AN0 to AN7
1000: AN8
1001: AN8, AN9
1010: AN8 to AN10
1011: AN8 to AN11
11xx: Setting
prohibited