Renesas H8S/2100 Series Hardware Manual page 257

Table 10.6 TPSC2 to TPSC0 (channel 0)
Bit 2
Channel TPSC2
0 0
1
Table 10.7 TPSC2 to TPSC0 (channel 1)
Bit 2
Channel TPSC2
1 0
1
Note: This setting is ignored when channel 1 is in phase counting mode.
Bit 1 Bit 0
TPSC1 TPSC0
0 0
1
1 0
1
0 0
1
1 0
1
Bit 1 Bit 0
TPSC1 TPSC0
0 0
1
1 0
1
0 0
1
1 0
1
Section 10 16-Bit Timer Pulse Unit (TPU)
Description
Internal clock: counts on φ
Internal clock: counts on φ/4
Internal clock: counts on φ/16
Internal clock: counts on φ/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
External clock: counts on TCLKC pin input
External clock: counts on TCLKD pin input
Description
Internal clock: counts on φ
Internal clock: counts on φ/4
Internal clock: counts on φ/16
Internal clock: counts on φ/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
Internal clock: counts on φ/256
Setting prohibited
Rev. 1.00 May 09, 2008 Page 231 of 954
REJ09B0462-0100