Renesas H8S/2100 Series Hardware Manual page 587

Bit Bit Name
2 KBF
1 PER
0 KBS
Note: * Only 0 can be written for clearing the flag.
Initial
Value R/W Description
0 R/(W)* Keyboard Buffer Register Full
Indicates that data reception has been completed and
the received data is in KBBR. When both KBIE and
KBF are set to1, an interrupt request is sent to the
CPU.
0: [Clearing condition]
1: [Setting conditions]
•
•
0 R/(W)* Parity Error
Indicates that an odd parity error has occurred.
0: [Clearing condition]
1: [Setting condition]
0 R Keyboard Stop
Indicates the receive data stop bit. Valid only when
KBF = 1.
0: 0 stop bit received
1: 1 stop bit received
Section 19 Keyboard Buffer Control Unit (PS2)
Read KBF when KBF =1, then write 0 in KBF
When data has been received normally and has
been transferred to KBBR while KBFSEL = 1
(keyboard buffer register full flag)
When a KCLK falling edge is detected while
KBFSEL = 0 (KCLK interrupt flag)
Read PER when PER =1, then write 0 in PER
When an odd parity error occurs
Rev. 1.00 May 09, 2008 Page 561 of 954
REJ09B0462-0100