Renesas H8S/2100 Series Hardware Manual page 929

Register
Module Abbreviation
PORT P4DDR
PORT P3DR
PORT P4DR
PORT P5DDR
PORT P6DDR
PORT P5DR
PORT P6DR
PORT PBODR
PORT P8DDR
PORT PBPIN
PORT P7PIN
PORT PBDDR
PORT P8DR
PORT P9DDR
PORT P9DR
PORT P6PCR
CIR CCR1
CIR CCR2
CIR CSTR
CIR CEIR
CIR BRR
CIR CIRRDR0 to 7
CIR HHMAX
CIR HHMIN
CIR HLMAX
CIR HLMIN
Number
of Bits Address
8 H'FFB5
(PORTS = 0)
8 H'FFB6 (PORTS = 0)
8 H'FFB7 (PORTS = 0)
8 H'FFB8 (PORTS = 0)
8 H'FFB9 (PORTS = 0)
8 H'FFBA (PORTS = 0)
8 H'FFBB (PORTS = 0)
8 H'FFBC (PORTS = 0)
8 H'FFBD (Write)
(PORTS = 0)
8 H'FFBD (Read)
(PORTS = 0)
8 H'FFBE (Read)
(PORTS = 0)
8 H'FFBE (Write)
(PORTS = 0)
8 H'FFBF (PORTS = 0)
8 H'FFC0 (PORTS = 0)
8 H'FFC1 (PORTS = 0)
8 H'FFF2 (RELOCATE = 0)
(PORTS = 0)
8 H'FA40
8 H'FA41
8 H'FA42
8 H'FA43
8 H'FA44
8 H'FA45
8 H'FA46
8 H'FA48
8 H'FA4A
8 H'FA4B
Section 27 List of Registers
Data Bus
Width
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Rev. 1.00 May 09, 2008 Page 903 of 954
REJ09B0462-0100
Access
States
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2