Pmci Status Register (Pmcists) (I = 0, 1) - Renesas M16C/64C User Manual

M16C/64C Group
22.2.5

PMCi Status Register (PMCiSTS) (i = 0, 1)

PMC0 Status Register
b7 b6 b5 b4 b3 b2
PMC1 Status Register
b7 b6 b5 b4 b3 b2
Each bit in the PMCiSTS register changes at a measurement edge of the PMCi internal input signal.
However, the DRFLG bit also changes according to the counter value judgement.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
b1 b0
Symbol
PMC0STS
Bit Symbol
CPFLG Compare match flag
REFLG Receive error flag
DRFLG Data receiving flag
BFULFLG Receive buffer full flag
PTHDFLG Header pattern match flag
PTD0FLG Data 0 pattern match flag
PTD1FLG Data 1 pattern match flag
SDFLG Special pattern match flag
b1 b0
Symbol
PMC1STS
Bit Symbol
—
No register bit. If necessary, set to 0. Read as undefined value.
(b0)
REFLG Receive error flag
DRFLG Data receiving flag
—
No register bit. If necessary, set to 0. Read as undefined value.
(b3)
PTHDFLG Header pattern match flag
PTD0FLG Data 0 pattern match flag
PTD1FLG Data 1 pattern match flag
—
No register bit. If necessary, set to 0. Read as undefined value.
(b7)
Address
01F4h
Bit Name
0: Not match
1: Match
0: No error occurs
1: Error occurs
0: Waiting for data reception
1: Data receiving
0: Receive buffer empty
1: Receive buffer full (48 bits received)
0: Not match
1: Match
0: Not match
1: Match
0: Not match
1: Match
0: Not match
1: Match
Address
01FCh
Bit Name
0: No error occurs
1: Error occurs
0: Waiting for data reception
1: Data receiving
0: Not match
1: Match
0: Not match
1: Match
0: Not match
1: Match
22. Remote Control Signal Receiver
Reset Value
00h
Function
Reset Value
X000 X00Xb
Function
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