Rtc Status Register (Rtcsr) - Renesas SH7727 General Information Manual

R0P7727TH003TRKE General Information Manual
(6) CNTS
CNTS bit
0
1

6.3.2 RTC Status Register (RTCSR)

Address: 0x001 Initial value: 0x00
D7 D6
0 0
R R
(1) ARF
ARF bit
0
1
(2) 1secF
1secF bit
0
1
(3) 0.5secF
0.5secF bit
0
1
The setting (value) of each counter is not updated.
(Initial value)
The setting (value) of each counter is updated.
[Zero-clear condition]
Counter update is completed.
This clear operation is automatically performed.
D5 D4
0 0
R R
The setting of each alarm register with the AR bit set is not the
same as that of each counter register (Initial value)
The setting of each alarm register with the AR bit set is identical
to that of each counter register. At this time, an interrupt occurs
if the ARI bit is set to "1.''
[Clear condition]
"0'' is written with the ARF bit set to "1.''
A second has not elapsed yet (Initial value)
A second has elapsed.
[Clear condition]
"0'' is written with the 1secF bit set to "1.''
A half second has not elapsed yet. (Initial value)
A half second has elapsed yet.
[Clear condition]
"0'' is written with the 0.5secF bit set to "1.''
Setting
D3 D2
0.5 secF 1 secF
R/W R/W
Setting
Setting
Setting
51
Power Supply Controller
D1 D0
ARF 0
R/W R