H3C MSR 20-20 Command Reference Manual page 676

Msr 20/30/50 series routers
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676
C
45: CPOS I
HAPTER
Example
C
C
NTERFACE
ONFIGURATION
OMMANDS
Different from the display controller cpos command, this command can display
the error and alarm information of lower-order paths and T1 frames.
# Display the status information of T1 channel 2 on interface CPOS 4/0.
<Sysname> display controller cpos 4/0 t1 2
Cpos4/0 current state : UP
master, loopback not set
Tx: J0: 0x01, J1: "NetEngine", C2: 0x02
Rx: J0: 0x01, J1: "NetEngine", C2: 0x02
Regenerator section:
Alarm: none
Error: 0 BIP, 0 SEF
Multiplex section:
Alarm: none
Error: 0 BIP, 0 REI
Higher order path(VC-3-2):
Alarm: none
Error: 0 BIP, 0 REI
Lower order path:
Alarm: none
Error: 4095 BIP, 2047 REI
Cpos4/0
CT1 2 is up
Frame-format ESF, clock master, loopback not set
T1 framer(2-1-1):
Alarm: none
Error: 4095 FERR, 79 AERR
Table 123 Description on the fields of the display controller cpos t1 command
Field
Cpos4/0 current state
Frame-format SDH, multiplex
AU-3, clock master, loopback
not set
Tx: J0: 0x01, J1: "NetEngine",
C2: 0x02
Rx: J0: 0x01, J1: "NetEngine",
C2: 0x02
Regenerator section
Multiplex section
Higher order path(VC-3-2)
Lower order path
Error
Cpos4/0 CT1 2 is up
Frame-format ESF, clock master,
loopback not set
Frame-format SDH, multiplex AU-3, clock
Description
The current physical state of the CPOS interface
Physical layer information of the CPOS interface: the
framing format is set to SDH, AU-3 path is adopted, master
clock (internal clock signal) is used, and loopback is
disabled.
The sent overhead bytes.
The received overhead bytes.
Alarms and errors about the regeneration section.
Alarms and errors about the regeneration section.
Alarm and error statistics about the higher-order path to
which the T1 channel belongs. VC-3-2 means the second
VC-3.
Alarm and error statistics about the lower-order path.
Error statistics.
The current physical state of T1 channel 2 on interface
CPOS 4/0.
Information about the physical layer of the T1 channel: the
framing format is set to ESF, master clock (internal clock
signal) is used, loopback is disabled.

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