Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1574

ADSP-SC58x USB Register Descriptions
EPn Transmit Configuration and Status (Peripheral) Register
The
USB_EP[n]_TXCSR_P
the currently selected transmit endpoint.
AUTOSET (R/W)
TxPkRdy Autoset Enable
ISO (R/W)
Isochronous Transfers Enable
DMAREQEN (R/W)
DMA Request Enable Tx EP
FRCDATATGL (R/W)
Force Data Toggle
DMAREQMODE (R/W)
DMA Mode Select
INCOMPTX (R/W0C)
Incomplete Tx
CLRDATATGL (R/W)
Clear Endpoint Data Toggle
Figure 27-74: USB_EP[n]_TXCSR_P Register Diagram
Table 27-50: USB_EP[n]_TXCSR_P Register Fields
Bit No.
(Access)
15 AUTOSET
(R/W)
27–162
register provides (in peripheral mode) control and status bits for transfers through
15 14 13 12 11 10
0 0 0 0 0 0
Bit Name
TxPkRdy Autoset Enable.
The USB_EP[n]_TXCSR_P.AUTOSET bit enables (in peripheral mode) automatic
setting of the USB_EP[n]_TXCSR_P.TXPKTRDY bit when the maximum data
packet size (USB_EP[n]_TXMAXP) is loaded into the transmit FIFO. The
USB_EP[n]_TXMAXP
the maximum packet size is loaded, the USB_EP[n]_TXCSR_P.TXPKTRDY bit
needs to be set manually. For products supporting high-speed operation, this
USB_EP[n]_TXCSR_P.AUTOSET bit should not be set for high-bandwidth end-
points (endpoints with
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
9 8 7 6 5 4 3 2
0 0 0 0 0 0 0 0
Description/Enumeration
value must be a word (4-byte) multiple. If a packet less than
USB_EP[n]_TXMAXP
0 Disable Autoset
1 Enable Autoset
1 0
0 0
TXPKTRDY (R/W1S)
Tx Packet Ready
NEFIFO (R)
Not Empty FIFO
URUNERR (R/W0C)
Underrun Error
FLUSHFIFO (R/W)
Flush Endpoint FIFO
SENDSTALL (R/W)
Send STALL
SENTSTALL (R/W0C)
Sent STALL
value greater than 1).