Software Protection; Error Protection; Table 17.13 Software Protection - Renesas H8SX/1500 Series Hardware Manual

32-bit cisc microcomputer

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Section 17 Flash Memory (0.18-(m F-ZTAT Version)

Software Protection

The software protection protects the flash memory against programming/erasing by disabling

download of the programming/erasing program, using the key code, and by the RAMER setting.

The programming/erasing protection state is

entered when the SCO bit in FCCS is cleared to 0

to disable download of the programming/erasing

The programming/erasing protection state is

entered because download and

programming/erasing are disabled unless the

required key code is written in FKEY.

The programming/erasing protection state is

entered when the RAMS bit in the RAM emulation

Error protection is a mechanism for aborting programming or erasure when a CPU runaway

occurs or operations not according to the programming/erasing procedures are detected during

programming/erasing of the flash memory. Aborting programming or erasure in such cases

prevents damage to the flash memory due to excessive programming or erasing.

If an error occurs during programming/erasing of the flash memory, the FLER bit in FCCS is set

to 1 and the error protection state is entered.

• When an interrupt request, such as NMI, occurs during programming/erasing.

• When the flash memory is read from during programming/erasing (including a vector read or

an instruction fetch).

• When a SLEEP instruction is executed (including software-standby mode) during

programming/erasing.

• When a bus master other than the CPU, such as the DMAC, obtains bus mastership during

programming/erasing.

Rev. 3.00 Mar. 14, 2006 Page 624 of 804

REJ09B0104-0300

Function to be Protected

Programming/

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