Erase Block Register 1 (Ebr1) - Renesas H8 Series Hardware Manual

16-bit single-chip microcomputer
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7.2.3

Erase Block Register 1 (EBR1)

EBR1 specifies the flash memory erase area block. EBR1 is initialized to H'00 when the SWE bit
in FLMCR1 is 0. Do not set more than one bit at a time, as this will cause all the bits in EBR1 to
be automatically cleared to 0.
Bit
Bit Name
7 to 5
4
EB4
3
EB3
2
EB2
1
EB1
0
EB0
Note:
When this bit is set to 1 in the H8/36092F, 12 kbytes of H'1000 to H'3FFF will be
*
erased.
Initial
Value
R/W
Description
All 0
Reserved
These bits are always read as 0.
0
R/W
When this bit is set to 1, 28 kbytes of H'1000 to H'7FFF
will be erased.*
0
R/W
When this bit is set to 1, 1 kbyte of H'0C00 to H'0FFF will
be erased.
0
R/W
When this bit is set to 1, 1 kbyte of H'0800 to H'0BFF will
be erased.
0
R/W
When this bit is set to 1, 1 kbyte of H'0400 to H'07FF will
be erased.
0
R/W
When this bit is set to 1, 1 kbyte of H'0000 to H'03FF will
be erased.
Rev. 1.00 Aug. 28, 2006 Page 101 of 400
Section 7 ROM
REJ09B0268-0100

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