Advanced-control timers (TIM1/TIM8)
Table 277. TIM1 register map and reset values (continued)
Register
Offset
name
TIM1_CCR5
0x58
Reset value
0
TIM1_CCR6
0x5C
Reset value
TIM1_OR2
0x60
Reset value
TIM1_OR3
0x64
Reset value
Refer to
37.4.33
TIM8 register map
TIM8 registers are mapped as 16-bit addressable registers as described in the table below:
Register
Offset
name
TIM8_CR1
0x00
Reset value
TIM8_CR2
0x04
Reset value
TIM8_SMCR
0x08
Reset value
TIM8_DIER
0x0C
Reset value
TIM8_SR
0x10
Reset value
1300/2301
0
0
Section 2.2 on page 91
Table 278. TIM8 register map and reset values
MMS2[3:0]
0
0
0
0
0
ETRSEL
[2:0]
0
0
0
for the register boundary addresses.
0
0
0
0
0
0
0
0
0
0
0
0
RM0432 Rev 6
CCR5[15:0]
0
0
0
0
0
0
0
0
0
CCR6[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CKD
CMS
[1:0]
[1:0]
0
0
0
0
0
0
MMS
[2:0]
0
0
0
0
0
0
0
0
0
ETP
S
ETF[3:0]
TS[2:0]
[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RM0432
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
SMS[2:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Need help?
Do you have a question about the STM32L4+ Series and is the answer not in the manual?