Irq Sense Control Registers H And L (Iscrh And Iscrl) - Renesas H8SX/1520 Series Hardware Manual

Section 5 Interrupt Controller
5.3.5

IRQ Sense Control Registers H and L (ISCRH and ISCRL)

ISCRH and ISCRL select the source that generates an interrupt request on pins IRQ14 to IRQ0.
Upon changing the setting of ISCR, IRQnF (n = 14 to 0) in ISR is often set to 1 accidentally
through an internal operation. In this case, an interrupt exception handling is executed if an IRQn
interrupt request is enabled. In order to prevent such an accidental interrupt from occurring, the
setting of ISCR should be changed while the IRQn interrupt is disabled, and then the IRQnF in
ISR should be cleared to 0.
• ISCRH
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name IRQ11SR
Initial Value
R/W
• ISCRL
Bit
Bit Name IRQ7SR
Initial Value
R/W
Bit
Bit Name IRQ3SR
Initial Value
R/W
Rev. 3.00 Mar. 14, 2006 Page 96 of 804
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15 14
— — IRQ14SR
0 0
R/W R/W R/W
7 6
IRQ11SF IRQ10SR
0 0
R/W R/W R/W
15 14
IRQ7SF IRQ6SR
0 0
R/W R/W R/W
7 6
IRQ3SF IRQ2SR
0 0
R/W R/W R/W
13 12 11
IRQ14SF IRQ13SR
0 0 0
R/W R/W
5 4 3
IRQ10SF IRQ9SR
0 0 0
R/W R/W
13 12 11
IRQ6SF IRQ5SR
0 0 0
R/W R/W
5 4 3
IRQ2SF IRQ1SR
0 0 0
R/W
R/W
10 9
IRQ13SF IRQ12SR IRQ12SF
0 0
R/W R/W
2 1
IRQ9SF IRQ8SR IRQ8SF
0 0
R/W R/W
10 9
IRQ5SF IRQ4SR IRQ4SF
0 0
R/W R/W
2 1
IRQ1SF IRQ0SR IRQ0SF
0 0
R/W R/W
8
0
R/W
0
0
R/W
8
0
R/W
0
0
R/W