14.4.6
KBF Setting Timing and KCLK Control
Figure 14.11 shows the KBF setting timing and the KCLK pin states.
*
KCLK
(pin)
Internal
KCLK
Falling edge
signal
RXCR3 to
B'1010
RXCR0
KBF
KCLK
(output)
Note: *
The
clock shown here is scaled by 1/N in medium-speed mode when the operating
mode is active mode.
Figure 14.11 KBF Setting and KCLK Automatic I/O Inhibit Generation Timing
Rev. 1.00, 05/04, page 362 of 544
11th fall
B'0000
Automatic I/O inhibit