6.6
Descriptions of Registers of the Flash Memory
6.6.1
Flash Memory Control Register 1 (FLMCR1)
Bit
7
—
Initial value
0
Read/Write
—
FLMCR1 is a register that makes the flash memory change to program mode, program-verify
mode, erase mode, or erase-verify mode. For details on register setting, refer to section 6.8, Flash
Memory Programming/Erasing. By setting this register, the flash memory enters program mode,
erase mode, program-verify mode, or erase-verify mode. Read the data in the state that bits 6 to 0
of this register are cleared when using flash memory as normal built-in ROM.
Bit 7—Reserved
This bit is always read as 0 and cannot be modified.
Bit 6—Software Write Enable (SWE)
This bit is to set enabling/disabling of programming/enabling of flash memory (set when bits 5 to
0 and the EBR register are to be set).
Bit 6
SWE
Description
0
Programming/erasing is disabled. Other FLMCR1 register bits and all EBR bits
cannot be set.
1
Flash memory programming/erasing is enabled.
6
5
SWE
ESU
PSU
0
0
R/W
R/W
R/W
4
3
2
EV
PV
0
0
0
R/W
R/W
Rev. 6.00 Aug 04, 2006 page 171 of 680
Section 6 ROM
1
0
E
P
0
0
R/W
R/W
(initial value)
REJ09B0145-0600