Table of Contents
Advertisement
Section 8 8-Bit PWM Timer (PWM)
This LSI has an on-chip pulse width modulation (PWM) timer with eight outputs. Eight output
waveforms are generated from a common timebase, enabling PWM output with a high carrier
frequency to be produced using pulse division.
8.1
Features
• Operable at a maximum carrier frequency of 1.25 MHz using pulse division (at 20-MHz
operation)
• Duty cycles from 0 to 100% with 1/256 resolution (100% duty realized by port output)
• Direct or inverted PWM output, and PWM output enable/disable control
Figure 8.1 shows a block diagram of the PWM timer.
P10/PW0
P11/PW1
P12/PW2
P13/PW3
P14/PW4
P15/PW5
P16/PW6
P17/PW7
PWDPR
PWOER
P1DDR
P1DR
PTCNT0
[Legend]
PWSL:
PWM register select
PWDR:
PWM data register
PWDPR:
PWM data polarity register
PWOER:
PWM output enable register
PCSR:
Peripheral clock select register
P1DDR:
Port 1 data direction register
P1DR:
Port 1 data register
PTCNT0:
Port control register 0
PWM0800A_000020020300
Comparator 0
Comparator 1
Comparator 2
Comparator 3
Comparator 4
Comparator 5
Comparator 6
Comparator 7
Clock
counter
Figure 8.1 Block Diagram of PWM Timer
PWDR0
Module
PWDR1
data bus
PWDR2
PWDR3
PWDR4
PWDR5
PWDR6
PWDR7
Select
clock
φ/16
φ/8
φ/4
φ/2
φ
Internal clock
Rev. 1.00, 09/03, page 217 of 704
Internal
data bus
PWSL
PCSR
Advertisement
Table of Contents
