Bypass Register (Sdbpr) - Renesas H8S Family Hardware Manual

Section 26 Boundary Scan (JTAG)

Bypass Register (SDBPR)

SDBPR is a 1-bit shift register. In BYPASS, CLAMP, or HIGHZ mode, SDBPR is connected

between the ETDI and ETDO pins.

Boundary Scan Register (SDBSR)

SDBSR is a shift register provided on the PAD for controlling the I/O pins of this LSI.

Using EXTEST mode or SAMPLE/PRELOAD mode, a boundary scan test conforming to the

IEEE1149.1 standard can be performed.

Table 26.3 shows the relationship between the pins of this LSI and the boundary scan register.

Rev. 1.00 Mar. 12, 2008 Page 1024 of 1178

REJ09B0403-0100