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ST STM32L4+ Series Reference Manual page 1387

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RM0432
only by software (except UG which remains cleared automatically). As soon as the CEN bit
is written to 1, the prescaler is clocked by the internal clock CK_INT.
Figure 404
without prescaler.
Figure 404. Control circuit in normal mode, internal clock divided by 1
CEN=CNT_EN
Counter clock = CK_CNT = CK_PSC
Counter register
External clock source mode 1
This mode is selected when SMS=111 in the TIMx_SMCR register. The counter can count at
each rising or falling edge on a selected input.
TI2
Filter
ICF[3:0]
TIMx_CCMR1
shows the behavior of the control circuit and the upcounter in normal mode,
Internal clock
UG
CNT_INIT
31
Figure 405. TI2 external clock connection example
TI2F_Rising
Edge
detector
TI2F_Falling
CC2P
TIMx_CCER
General-purpose timers (TIM15/TIM16/TIM17)
3 2
33 34
35 36
TIMx_SMCR
TS[2:0]
ITRx
0xx
TI1_ED
100
TI1FP1
101
0
TI2FP2
110
1
(internal clock)
RM0432 Rev 6
00
01
02
03 04 05
TRGI
External clock
mode 1
CK_INT
Internal clock
mode
SMS[2:0]
TIMx_SMCR
06
07
MS31085V2
CK_PSC
MS31086V2
1387/2301
1463

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