ST STM32L4+ Series Reference Manual page 1316

General-purpose timers (TIM2/TIM3/TIM4/TIM5)
Timerclock = CK_CNT
Counter register
Counter underflow
Update event (UEV)
Update interrupt flag
Figure 362. Counter timing diagram, Update event with ARPE=1 (counter underflow)
Timerclock = CK_CNT
Counter register
Counter underflow
Update event (UEV)
Update interrupt flag
Auto-reload preload
Auto-reload active
1316/2301
Figure 361. Counter timing diagram, internal clock divided by N
CK_PSC
20
(UIF)
CK_PSC
CEN
06
(UIF)
FD
register
Write a new value in TIMx_ARR
register
RM0432 Rev 6
1F
01
05 04 03 02 01 00
FD
00
01 02 03 04 05 06 07
36
36
RM0432
MS31192V1
MS31193V1