Watchdog Timer Counter (Wtcnt); Watchdog Timer Control/Status Register (Wtcsr) - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
12.3.1

Watchdog Timer Counter (WTCNT)

WTCNT is an 8-bit readable/writable register that is incremented by cycles of the selected clock signal. When an
overflow occurs, it generates a watchdog timer overflow signal (WDTOVF) in watchdog timer mode and an interrupt in
interval timer mode.
Use 16-bit access to write to WTCNT, writing H'5A in the upper byte. Use 8-bit access to read from WTCNT.
Note: The method for writing to WTCNT differs from that for other registers to prevent erroneous writes. See section
12.3.4, Notes on Register Access for details.
12.3.2

Watchdog Timer Control/Status Register (WTCSR)

WTCSR is an 8-bit readable/writable register composed of bits to select the clock used for the count, overflow flags, and
timer enable bit.
When used to count the clock oscillation settling time for canceling software standby mode, it retains its value after
counter overflow.
Use 16-bit access to write to WTCSR, writing H'A5 in the upper byte. Use 8-bit access to read from WTCSR.
Note: The method for writing to WTCSR differs from that for other registers to prevent erroneous writes. See section
12.3.4, Notes on Register Access for details.
Bit Bit Name
7 IOVF
6 WT/IT
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
Bit: 7 6
Initial value: 0 0
R/W: R/W R/W
Bit: 7 6
IOVF WT/IT
Initial value: 0 0
R/W: R/(W) R/W
Initial
Value R/W Description
0 R/(W) Interval Timer Overflow
Indicates that WTCNT has overflowed in interval
timer mode. This flag is not set in watchdog timer
mode.
0: No overflow
1: WTCNT overflow in interval timer mode
[Clearing condition]
• When 0 is written to IOVF after reading IOVF
0 R/W Timer Mode Select
Selects whether to use this module as a watchdog timer or an interval timer.
0: Use as interval timer
1: Use as watchdog timer
Note:
5 4 3 2 1
0 0 0 0 0
R/W R/W R/W R/W R/W
5 4 3 2 1
TME - - CKS[2:0]
0 1 1 0 0
R/W R R R/W R/W
When the WTCNT overflows in watchdog timer mode, the
WDTOVF signal is output externally.
If this bit is modified when this module is running, the up-count
may not be performed correctly.
12. Watchdog Timer
0
0
R/W
0
0
R/W
12-3