Timer Interrupt Skipping Counter (Titcnt) - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
10.3.26

Timer Interrupt Skipping Counter (TITCNT)

TITCNT is an 8-bit readable counter. This module has one TITCNT. TITCNT retains its value even after stopping the
count operation of TCNT_3 and TCNT_4.
Bit Bit Name
7 —
6 to 4 3ACNT[2:0]
3 —
2 to 0 4VCNT[2:0]
Note: To clear the TITCNT, clear the bits T3AEN and T4VEN in TITCR to 0.
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
Bit:
7 6
- 3ACNT[2:0]
Initial value:
0 0
R/W:
R R
Initial
Value R/W Description
0 R Reserved
This bit is always read as 0.
000 R TGIA_3 Interrupt Counter
While the T3AEN bit in TITCR is set to 1, the count in these bits is incremented
every time a TGIA_3 interrupt occurs.
[Clearing conditions]
• When the 3ACNT2 to 3ACNT0 value in TITCNT matches the 3ACOR2 to
3ACOR0 value in TITCR
• When the T3AEN bit in TITCR is cleared to 0
• When the 3ACOR2 to 3ACOR0 bits in TITCR are cleared to 0
0 R Reserved
This bit is always read as 0.
000 R TCIV_4 Interrupt Counter
While the T4VEN bit in TITCR is set to 1, the count in these bits is incremented
every time a TCIV_4 interrupt occurs.
[Clearing conditions]
• When the 4VCNT2 to 4VCNT0 value in TITCNT matches the 4VCOR2 to
4VCOR0 value in TITCR
• When the T4VEN bit in TITCR is cleared to 0
• When the 4VCOR2 to 4VCOR0 bits in TITCR are cleared to 0
5 4 3 2 1
- 4VCNT[2:0]
0 0 0 0 0
R R R R R
10. Multi-Function Timer Pulse Unit 2
0
0
R
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