Multi-Processor Serial Data Transmission - Renesas RZ/A Series User Manual

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15.4.1

Multi-Processor Serial Data Transmission

Figure 15.13 is a sample flowchart of multi-processor data transmission. In the ID transmission cycle, the ID should be
transmitted with the MPBT bit in SSR set to 1. In the data transmission cycle, the data should be transmitted with the
MPBT bit set to 0. The other operations are the same as the operations in asynchronous mode.
Initialization
Start data transmission
TXI interrupt
Set MPBT bit in SSR
Write transmit data to TDR
All data written?
Clear the SCR.TIE bit to 0, and set the
SCR.TEIE bit to 1
TEI interrupt
Break output
Set the general-purpose I/O port
Clear bits TE, TIE, and TEIE in SCR to 0
<End>
Figure 15.13
Example of Multi-Processor Serial Transmission Flowchart
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
No
Yes
No
Yes
No
Yes
No
Yes
[ 1 ]
[ 1 ] Initialization:
The TXDn automatically becomes the output pin for
data being transmitted.
After the TE bit in SCR is set to 1, 1 is output for a
frame, and transmission is enabled.
[ 2 ] TXI interrupt request:
When transmit data is transferred from TDR to TSR,
[ 2 ]
a transmit data empty interrupt (TXI) request is
generated.
Set the MPBT bit in SSR to 0 or 1, and write transmit
data to TDR once in the TXI interrupt processing
routine.
[ 3 ] Serial transmission continuation procedure:
To continue serial transmission, write transmit data to
TDR once using a TXI interrupt request.
Transmit data can also be written to TDR by
activating the DMAC.
When TEI interrupt requests are in use, set the
[ 3 ]
SCR.TIE bit to 0 and the SCR.TEIE bit to 1 after the
last of the data to be transmitted are written to the
TDR.
[ 4 ] Break output at the end of serial transmission:
To output a break in serial transmission, set the
general-purpose I/O port corresponding to the TXDn
pin (corresponding to output of the low level), and
after switching the TXDn pin to the general-purpose
I/O port function, set the TE bit in the SCR to 0.
[ 4 ]
15. Serial Communications Interface
15-35

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