Riicnsr2 - I²C Bus Status Register 2 - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
18.3.10 RIICnSR2 — I²C Bus Status Register 2
Access: RIICnSR2 is a 32-bit readable/writable register.
RIICnSR2L and RIICnSR2H are 16-bit readable/writable registers.
RIICnSR2LL, RIICnSR2LH, RIICnSR2HL, and RIICnSR2HH are 8/1-bit readable/writable registers.
Address: RIICnSR2: <RIICn_base> + 0024
RIICnSR2L: <RIICn_base> + 0024
RIICnSR2LL: <RIICn_base> + 0024
RIICnSR2HH: <RIICn_base> + 0027
Initial Value: 0000 0000
Bit 31 30 29
— — —
Initial value 0 0 0
R/W R R R
Bit 15 14 13
— — —
0 0 0
Initial value
R/W R R R
Note 1. Only 0 can be written to this bit.
Table 18.15
Bit Position
31 to 8
7
6
5
4
3
2
1
0
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
H
, RIICnSR2H: <RIICn_base> + 0026
H
, RIICnSR2LH: <RIICn_base> + 0025
H
H
This register is initialized by any reset.
H
28 27 26
— — —
0 0 0
R R R
12 11 10
— — —
0 0 0
R R R
RIICnSR2 register contents
Bit Name Function
― Reserved
These bits are read as 0. The write value should be 0.
TDRE Transmit Data Empty Flag
0: RIICnDRT contains transmit data.
1: RIICnDRT contains no transmit data.
TEND Transmit End Flag
0: Data is being transmitted.
1: Data has been transmitted.
RDRF Receive Data Full Flag
0: RIICnDRR contains no receive data.
1: RIICnDRR contains receive data.
NACKF NACK Receive Flag
0: NACK is not received.
1: NACK is received.
STOP Stop Condition Detection Flag
0: Stop condition is not detected.
1: Stop condition is detected.
START Start Condition Detection Flag
0: Start condition is not detected.
1: Start condition is detected.
AL Arbitration-Lost Flag
0: Arbitration is not lost.
1: Arbitration is lost.
TMOF Timeout Flag
0: Timeout has not occurred.
1: Timeout occurred.
H
, RIICnSR2HL: <RIICn_base> + 0026
H
25 24 23 22
— — — —
0 0 0 0
R R R R
9 8 7 6
— — TDRE TEND
0 0 0 0
R R R R(/W)
*1
18. I²C Bus Interface
21 20 19 18
— — — —
0 0 0 0
R R R R
5 4 3 2
RDRF NACKF STOP START
0 0 0 0
R(/W) R(/W) R(/W) R(/W)
*1 *1 *1 *1
,
H
17 16
— —
0 0
R R
1 0
AL TMOF
0 0
R(/W) R(/W)
*1 *1
18-30