Spi Ac Input Characteristics Adjustment Register (Ckdly) (Rz/A1Lu Only) - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
17.4.19

SPI AC Input Characteristics Adjustment Register (CKDLY) (RZ/A1LU only)

CKDLY is used to adjust the timing of the setup and hold times for data input. The timing should be adjusted to suit the
AC characteristics of the serial flash memory to be connected. Settings of this register should be changed while the SSLF
flag in CMNSR is 0; otherwise, the operation cannot be guaranteed. When writing, write to the register as a 32-bit unit
with bits 15 to 8 set to H'A5.
Bit: 31
-
Initial value:
0
R/W:
R
Bit: 15
Initial value: 0
R/W: W
Bit Bit Name
31 to 16 ―
15 to 8 GB[7:0]
7 to 4 ―
3 to 0 CKDLY[3:0]
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
30 29 28 27 26
- - - - -
0 0 0 0 0
R R R R R
14 13 12 11 10
GB[7:0]
0 0 0 0 0
W W W W W
Initial
Value R/W
All 0 R
All 0 W
All 0 R
0100 R/W
25 24 23 22 21
- - - - -
0 0 0 0 0
R R R R R
9 8 7 6 5
- - -
0 0 0 0 0
W W R R R
Description
Reserved
These bits are always read as 0. The write value should always be 0.
Guard
When writing, write to the register as a 32-bit unit with these bits set to
H'A5.
These bits are always read as 0.
Reserved
These bits are always read as 0. The write value should always be 0.
Input Characteristics Adjustment
Switches the relative timing of the setup and hold times for data input.
The two values below are specifiable.
0100: Initial value
1010: Makes the data input setup time shorter and the data input hold
time longer.
Other than the above: Settings prohibited
17. SPI Multi I/O Bus Controller
20 19 18 17 16
- - - - -
0 0 0 0 0
R R R R R
4 3 2 1 0
- CKDLY[3:0]
0 0 1 0 0
R R/W R/W R/W R/W
17-25