Rscan0Fests - Fifo Empty Status Register - Renesas RZ/A Series User Manual

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RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group

RSCAN0FESTS — FIFO Empty Status Register

Can be read in 8-, 16-, and 32-bit units

<RSCAN0_base> + 0238

Initial value:

Initial value

Initial value

Bit Position

The RSCAN0FESTS register is set to 007F FFFF

CFkEMP Flag (k = 0 to 5)

The CFkEMP flag is set to 1 when the CFEMP flag in the RSCAN0CFSTSk register is set to 1 (the

transmit/receive FIFO buffer contains no message (buffer empty)). When the CFEMP flag is cleared to

0 (the transmit/receive FIFO buffer contains messages), the CFkEMP flag is cleared to 0.

RFxEMP Flag (x = 0 to 7)

The RFxEMP flag is set to 1 when the RFEMP flag in the RSCAN0RFSTSx register is set to 1 (the

receive FIFO buffer contains no unread message (buffer empty)). When the RFEMP flag is cleared to 0

(the receive FIFO buffer contains unread messages), the RFxEMP flag is cleared to 0.

R01UH0437EJ0600 Rev.6.00

Jan 29, 2021

RSCAN0FESTS register contents

These bits are always read as 0.

These bits are always read as 1.

Transmit/Receive FIFO Buffer Empty Status Flag

0: Transmit/receive FIFO buffer k contains a message.

1: Transmit/receive FIFO buffer k contains no message.

(k = 0 to 5)

Receive FIFO Buffer Empty Status Flag

0: Receive FIFO buffer x contains an unread message.

1: Receive FIFO buffer x contains no unread message (buffer empty).

(x = 0 to 7)

in global reset mode.

21. CAN Interface

Rz/a1 series Rz/a1lu series Rz/a1lc series